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http://tailieuso.udn.vn/handle/TTHL_125/10252| Title: | High Performance VLSI Architectures for QC-LDPC Codes in 5G Communications |
| Other Titles: | Kiến trúc VLSI hiệu suất cao cho bộ mã QC-LDPC trong hệ thống thông tin 5G |
| Authors: | Nguyen, Thi Bao Tram |
| Advisor: | Lee, Hanbo, Prof. |
| Keywords: | Quasi-cyclic LDPC code Channel codes 5G New Radio Encoding |
| Issue Date: | 2020 |
| Publisher: | Inha University |
| Description: | Doctoral thesis. Major: Information and Communication Engineering; 161 papes. |
| Table of contents: | Chapter1. Introduction; Chapter 2. Background and Fundamentals; Chapter 3. Low-Complexity Multi-Way Split-Row Layered LDPC Decoder for Gigabit Wireless Communications; ... |
| URI: | http://tailieuso.udn.vn/handle/TTHL_125/10252 |
| Appears in Collections: | Kỹ thuật |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| NguyenThiBaoTram.TT.pdf | Abstract & Table of Contents | 352.99 kB | Adobe PDF | View/Open |
| NguyenThiBaoTram.TV.pdf | Fulltext | 6.38 MB | Adobe PDF | View/Open Request a copy |
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