Please use this identifier to cite or link to this item: http://tailieuso.udn.vn/handle/TTHL_125/8520
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dc.contributor.authorHennessy, John L.-
dc.contributor.authorPatterson, David A-
dc.contributor.authorArpaci-Dusseau, Andrea C.-
dc.date.accessioned2018-06-15T03:52:45Z-
dc.date.available2018-06-15T03:52:45Z-
dc.date.issued2007-
dc.identifier.isbn13: 978-0-12-370490-0-
dc.identifier.isbn10: 0-12-370490-1-
dc.identifier.urihttp://tailieuso.udn.vn/handle/TTHL_125/8520-
dc.descriptionFourth Edition; 704 pagesen
dc.description.tableofcontentsChapter: Fundamentals of Computer Design; Chapter 2: Instruction-Level Parallelism and Its Exploitation; Chapter 3: Limits on Instruction-Level Parallelism; ...en
dc.language.isoenen
dc.publisherAmsterdam; Boston: Morgan Kaufmannen
dc.subjectComputer architectureen
dc.titleComputer Architecture: A Quantitative Approachen
dc.typeBooken
Appears in Collections:0.Khoa học máy tính, Thông tin & tác phẩm tổng quát

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